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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.15 AND (And Word Data of Source Register to Data in
Memory)
Takes the logical AND of the word data at memory address "Ri" and the word data in
"Rj", stores the results to the memory address corresponding to "Ri".
The CPU will not accept hold requests between the memory read operation and the
memory write operation of this request.
■ AND (And Word Data of Source Register to Data in Memory)
Assembler format: AND Rj, @Ri
Operation: (Ri) and Rj → (Ri)
Flag change:
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V and C: Unchanged
Execution cycles: 1 + 2a cycles
Instruction format:
NZVC
CC– –
MSB LSB
10000100 Rj Ri