Fujitsu CM71-00101-5E Server User Manual


 
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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.122 ORCCR (Or Condition Code Register and Immediate Data)
Takes the logical OR of the byte data in the condition code register (CCR) and the
immediate data, and returns the results into the "CCR".
ORCCR (Or Condition Code Register and Immediate Data)
Assembler format: ORCCR #u8
Operation: CCR or u8 CCR
Flag change:
S, I, N, Z, V, and C: Varies according to results of calculation.
Execution cycles: c cycle(s)
The number of execution cycles is normally "1". However, if the instruction immediately after
involves read or write access to memory address "R15", the system stack pointer (SSP) or the user
stack pointer (USP), then an interlock is applied and the value becomes 2 cycles.
Instruction format:
Example: ORCCR #10H
SINZVC
CCCCCC
MSB LSB
10010011
u8
CCR CCR
000101
SINZVC
010101
SINZVC
Before execution After execution
Instruction bit pattern : 1001 0011 0001 0000