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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.2 ADD (Add 4-bit Immediate Data to Destination Register)
Adds the result of the higher 28 bits of 4-bit immediate data with zero extension to the
word data in "Ri", stores results to the "Ri".
■ ADD (Add 4-bit Immediate Data to Destination Register)
Assembler format: ADD #i4, Ri
Operation: Ri + extu(i4) → Ri
Flag change:
N : Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z : Set when the operation result is "0", cleared otherwise.
V : Set when an overflow has occurred as a result of the operation, cleared otherwise.
C : Set when a carry has occurred as a result of the operation, cleared otherwise.
Execution cycles: 1 cycle
Instruction format:
Example: ADD #2, R3
NZVC
CCCC
MSB LSB
10100100 i4 Ri
R3
9999 9997
NZVC
CCR
R3
CCR
0000
NZVC
1000
9999 9999
Instruction bit pattern : 1010 0100 0010 0011
Before execution After execution