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APPENDIX A Instruction Lists
Table A.2-2 Compare Instructions (3 Instructions)
Mnemonic Format OP CYC
FLAG
NZVC
Operation Remarks
CMP Rj, Ri
CMP #i4, Ri
CMP2 #i4, Ri
A
C
C
AA
A8
A9
1
1
1
CCCC
CCCC
CCCC
Ri – Rj
Ri – extu(i4)
Ri – extn(i4)
Zero extension
Minus extension
Table A.2-3 Logical Calculation Instructions (12 Instructions)
Mnemonic Format OP CYC
FLAG
NZVC
Operation RMW Remarks
AND Rj, Ri
AND Rj, @Ri
ANDH Rj, @Ri
ANDB Rj, @Ri
A
A
A
A
82
84
85
86
1
1+2a
1+2a
1+2a
CC – –
CC – –
CC – –
CC – –
Ri &= Rj
(Ri) &= Rj
(Ri) &= Rj
(Ri) &= Rj
-
❍
❍
❍
Word
Word
Half-word
Byte
OR Rj, Ri
OR Rj, @Ri
ORH Rj, @Ri
ORB Rj, @Ri
A
A
A
A
92
94
95
96
1
1+2a
1+2a
1+2a
CC – –
CC – –
CC – –
CC – –
Ri |= Rj
(Ri) |= Rj
(Ri) |= Rj
(Ri) |= Rj
-
❍
❍
❍
Word
Word
Half-word
Byte
EOR Rj, Ri
EOR Rj, @Ri
EORH Rj, @Ri
EORB Rj, @Ri
A
A
A
A
9A
9C
9D
9E
1
1+2a
1+2a
1+2a
CC – –
CC – –
CC – –
CC – –
Ri ^= Rj
(Ri) ^= Rj
(Ri) ^= Rj
(Ri) ^= Rj
-
❍
❍
❍
Word
Word
Half-word
Byte
Table A.2-4 Bit Operation Instructions (8 Instructions)
Mnemonic Format OP CYC
FLAG
NZVC
Operation RMW Remarks
BANDL #u4, @Ri (u4: 0 to 0F
H
)
BANDH #u4, @Ri (u4: 0 to 0F
H
)
C
C
80
81
1+2a
1+2a
– – – –
– – – –
(Ri)&={F0
H
+u4} ❍ Lower 4-bit operation
Higher 4-bit operation
(Ri)&={{u4<<4}+F
H
} ❍
BORL #u4, @Ri (u4: 0 to 0F
H
)
BORH #u4, @Ri (u4: 0 to 0F
H
)
C
C
90
91
1+2a
1+2a
– – – –
– – – –
(Ri) | = u4
(Ri) | = {u4<<4}
❍
❍
Lower 4-bit operation
Higher 4-bit operation
BEORL #u4, @Ri (u4: 0 to 0F
H
)
BEORH #u4, @Ri (u4: 0 to 0F
H
)
C
C
98
99
1+2a
1+2a
– – – –
– – – –
(Ri) ^ = u4
(Ri) ^ = {u4<<4}
❍
❍
Lower 4-bit operation
Higher 4-bit operation
BTSTL #u4, @Ri (u4: 0 to 0F
H
)
BTSTH #u4, @Ri (u4: 0 to 0F
H
)
C
C
88
89
2+a
2+a
0C – –
CC – –
(Ri) & u4
(Ri) & {u4<<4}
-
-
Lower 4-bit test
Higher 4-bit test