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APPENDIX A Instruction Lists
A.2 Instruction Lists
The full instruction set of the FR family CPU is 165 instructions, consisting of the following
sixteen types. These instructions are listed in Table A.2-1 through Table A.2-16.
• Add/Subtract Instructions (10 Instructions)
• Compare Instructions (3 Instructions)
• Logical Calculation Instructions (12 Instructions)
• Bit Operation Instructions (8 Instructions)
• Multiply/Divide Instructions (10 Instructions)
• Shift Instructions (9 Instructions)
• Immediate Data Transfer Instructions (3 Instructions)
• Memory Load Instructions (13 Instructions)
• Memory Store Instructions (13 Instructions)
• Inter-register Transfer Instructions / Dedicated Register Transfer Instructions
(5 Instructions)
• Non-delayed Branching Instructions (23 Instructions)
• Delayed Branching Instructions (20 Instructions)
• Direct Addressing Instructions (14 Instructions)
• Resource Instructions (2 Instructions)
• Coprocessor Instructions (4 Instructions)
• Other Instructions (16 Instructions)
■ Instruction Lists
Table A.2-1 Add/Subtract Instructions (10 Instructions)
Mnemonic Format OP CYC
FLAG
NZVC
Operation Remarks
ADD Rj, Ri
ADD #i4, Ri
ADD2 #i4, Ri
A
C
C
A6
A4
A5
1
1
1
CCCC
CCCC
CCCC
Ri + Rj → Ri
Ri + extu(i4) → Ri
Ri + extn(i4) → Ri
Zero extension
Minus extension
ADDC Rj, Ri A A7 1 CCCC Ri + Rj + c → Ri Add with carry
ADDN Rj, Ri
ADDN #i4, Ri
ADDN2 #i4, Ri
A
C
C
A2
A0
A1
1
1
1
– – – –
– – – –
– – – –
Ri + Rj → Ri
Ri + extu(i4) → Ri
Ri + extn(i4) → Ri
Zero extension
Minus extension
SUB Rj, Ri A AC 1 CCCC Ri – Rj → Ri
SUBC Rj, Ri A AD 1 CCCC Ri – Rj – c → Ri Subtract with carry
SUBN Rj, Ri A AE 1 – – – – Ri – Rj → Ri