Fujitsu CM71-00101-5E Server User Manual


 
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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.51 ASR (Arithmetic Shift to the Right Direction)
Makes an arithmetic right shift of the word data in "Ri" by "u4" bits, stores the result to
"Ri".
ASR (Arithmetic Shift to the Right Direction)
Assembler format: ASR #u4, Ri
Operation: Ri >> u4 Ri
Flag change:
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V: Unchanged
C: Holds the bit value shifted last. Cleared when the shift amount is "0".
Execution cycles: 1 cycle
Instruction format:
Example: ASR #8, R3
NZVC
CC–C
MSB LSB
10111000 u4 Ri
R3 R3
FFFF 0FFFFF0F FFFF
NZVC
CCR CCR
NZVC
10010000
Instruction bit pattern : 1011 1000 1000 0011
Before execution After execution