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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.87 JMP (Jump)
This is a branching instruction with no delay slot.
Branches to the address indicated by "Ri".
■ JMP (Jump)
Assembler format: JMP @Ri
Operation: Ri → PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: 2 cycles
Instruction format:
Example: JMP @R1
NZVC
––––
MSB LSB
100101110000 Ri
R1R1
C000 8000
FF80 0000
0000 00FF
C000 8000
PC PC
Before execution After execution
Instruction bit pattern : 1001 0111 0000 0001