Filter
Top Products
78
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.7 ADDN2 (Add Immediate Data to Destination Register)
Adds the result of the higher 28 bits of 4-bit immediate data with minus extension to
word data in "Ri", stores the results to "Ri" without changing flag settings.
■ ADDN2 (Add Immediate Data to Destination Register)
Assembler format: ADDN2 #i4, Ri
Operation: Ri + extn(i4) + → Ri
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: 1 cycle
Instruction format:
Example: ADDN2 #–2, R3
NZVC
––––
MSB LSB
10100001 i4 Ri
R3
9999 9999
NZVC
CCR
R3
CCR
0000
NZVC
0000
9999 9997
Instruction bit pattern :1010 0001 1110 0011
Before execution After execution