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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.77 STH (Store Half-word Data in Register to Memory)
Stores the half-word data in "Ri" to memory address "(R13 + Rj)".
■ STH (Store Half-word Data in Register to Memory)
Assembler format: STH Ri, @(R13, Rj)
Operation: Ri → ( R13 + Rj)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: a cycle(s)
Instruction format:
Example: STH R3, @(R13, R2)
NZVC
––––
MSB LSB
00010001 Rj Ri
R2
1234567A
0000 0004
0000 4321
R2
R3R3
0000 4321
4321
0000 0004
1234567A
1234567C 1234567C
1234 5678
R13 R13
1234 5678
xxxx
Memory Memory
Before execution After execution
Instruction bit pattern : 0001 0001 0010 0011