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APPENDIX A Instruction Lists
Note:
The field "o8" in the TYPE-B instruction format and the field "u4" in the TYPE-C format have the
following relation to the values "disp8" to "disp10" in assembly notation.
Table A.2-8 Memory Load Instructions (13 Instructions)
Mnemonic Format OP CYC
FLAG
NZVC
Operation Remarks
LD @Rj, Ri
LD @(R13,Rj), Ri
LD @(R14,disp10), Ri
LD @(R15,udisp6), Ri
LD @R15+, Ri
LD @R15+, Rs
LD @R15+, PS
A
A
B
C
E
E
E
04
00
20
03
07-0
07-8
07-9
b
b
b
b
b
b
1+a+b
– – – –
– – – –
– – – –
– – – –
– – – –
– – – –
CCCC
(Rj) → Ri
(R13+Rj) → Ri
(R14+disp10) → Ri
(R15+udisp6) → Ri
(R15) → Ri,R15+=4
(R15) → Rs, R15+=4
(R15) → PS, R15+=4
Rs: dedicated register
LDUH @Rj, Ri
LDUH @(R13,Rj), Ri
LDUH @(R14,disp9), Ri
A
A
B
05
01
40
b
b
b
– – – –
– – – –
– – – –
(Rj) → Ri
(R13+Rj) → Ri
(R14+disp9) → Rj
Zero extension
Zero extension
Zero extension
LDUB @Rj, Ri
LDUB @(R13,Rj), Ri
LDUB @(R14,disp8), Ri
A
A
B
06
02
60
b
b
b
– – – –
– – – –
– – – –
(Rj) → Ri
(R13+Rj) → Ri
(R14+disp8) → Ri
Zero extension
Zero extension
Zero extension
•disp8
→ o8=disp8
•disp9
→ o8=disp9 >> 1
• disp10
→ o8=disp10 >> 2
•udisp6
→ u4=udisp6 >> 2