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PREFACE
■ Objectives and intended reader
The FR* family CPU core features proprietary Fujitsu architecture and is designed for controller
applications using 32-bit RISC based computing. The architecture is optimized for use in microcontroller
CPU cores for built-in control applications where high-speed control is required.
This manual is written for engineers involved in the development of products using the FR family of
microcontrollers. It is designed specifically for programmers working in assembly language for use with
FR family assemblers, and describes the various instructions used with FR family. Be sure to read the entire
manual carefully.
Note* that the use or non-use of coprocessors, as well as coprocessor specifications depends on the
functions of individual FR family products.
For information about coprocessor specifications, users should consult the coprocessor section of the
product documentation. Also, for the rules of assembly language grammar and the use of assembler
programs, refer to the "FR Family Assembler Manual".
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited.
■ Trademark
The company names and brand names herein are the trademarks or registered trademarks of their respective
owners.