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CHAPTER 3 NDA-24296
Page 198
Revision 1.0
PH-CK16-A
Phase Lock Oscillator
[Mounted in TSWM0 of IPX-U/IPX-UMG System]
SWITCH
NAME
SWITCH
NO.
SETTING
STANDARD
SETTING
MEANING
SW01
1
ON
×
Clock subordinate office. (Fixed)
OFF Clock source office.
2
ON
Digital Clock Supply route zero (DCS 0) is used.
(In case this circuit card is accommodated as #0 system.)
OFF
Digital Clock Supply route zero (DCS 0) is not used.
(In case this circuit card is accommodated as #1 system.)
3
ON
Digital Clock Supply route one (DCS 1) is used.
(In case this circuit card is accommodated as #1 system.)
OFF
Digital Clock Supply route one (DCS 1) is not used.
(In case this circuit card is accommodated as #0 system.)
4
ON
8 KHz of Frame Head signals are extracted from the DCS
signals (which is composed of 64 KHz + 8 KHz).
OFF
×
8 KHz of Frame Head signals are not extracted from the DCS
signals (which is composed of 64 KHz + 8 KHz).
5
ON
When clock source failure has occurred in all supply routes, the
PLO outputs the original clock of the internal oscillator.
OFF ×
When clock source failure has not occurred, the PLO keeps on
outputting the current phase clock.
6
ON
×
This circuit card is associated with SYNC (PA-CK16) card and
5m Frame Pulse (FP) is supplied by the SYNC card.
(Fixed to “ON”)
OFF This circuit card is not associated with SYNC (PA-CK16) card.
7
ON A-law CODEC is used for Music-on-Hold.
OFF × µ-law CODEC is used for Music-on-Hold.
8OFF × Fixed OFF (Not used).