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NDA-24296 CHAPTER 3
Page 239
Revision 1.0
PH-CK18
Clock
PH-CK18
Clock
1. General Function
This circuit card is used for the Local Node (LN) of the IPX-U system or used for the Local Module Group
(LMG) of the IPX-UMG system. The main function of this circuit card is to supply basic clock signals to
the system. This card receives clock signals from the Phase Lock Oscillator (PLO) located in TSWM0 of
IMG1/5/9/13, distributing the following signals to the Time Division Switch (TSW) located in TSWM1 of
IMG2/6/10/14.
• 32.768 MHz CLK
• 8 KHz FH
• 5 msec × “n” FH (for Wireless System)
Figure 3-35 Location of PH-CK18 (CLK)
LN0/LMG0
(IMG2/IMG3)
LN3/LMG3
(IMG2/IMG3)
/(IMG14/IMG15)
32M, FH+WFH
PLO ACT
32M, FH+WFH
PLO ACT
CLK1
(TSWM1)
TSW
10~13
CLK0
(TSWM1)
TSW
00~03
MUX
(System1)
MUX
(System0)
LC/TRK
HSW00
ISW
HSW01
CLK1
(TSWM1)
TSW
10~13
CLK0
(TSWM1)
TSW
00~03
MUX
(System1)
MUX
(System0)
LC/TRK
LN0/LMG0
(IMG0/IMG1)
from
LN/LMG DTI
from
LN/LMG DTI
32M, FH+WFH
PLO ACT
32M, FH+WFH
PLO ACT
(BWB)
32M, FH+WFH
PLO ACT
(BWB)
64K+FH, WFH
TSW ACT
(Cable)
64K+FH, WFH
TSW ACT
(Cable)
PLO 1
(TSWM0)
TSW
10~13
PLO 0
(TSWM0)
TSW
00~03
MUX
(System1)
MUX
(System0)
LC/TRK
LN3/LMG3
(IMG0/IMG1)
/(IMG12/IMG13)
32M, FH+WFH
PLO ACT
PLO 1
(TSWM0)
TSW
10~13
PLO 0
(TSWM0)
TSW
00~03
MUX
(System1)
MUX
(System0)
LC/TRK
TSW00 TSW03
HSW10
OSC
64K+8K
(BWB)
(BWB)
CLK, FH, WFH
ACT, ALM
PLO 0
DTI0 DCS0 (MDF) DCS1123
PLO 1
SEL
PLL
Drv
HSW11
TSW10 TSW13
SEL
PLL
Drv
OSC
~
~~
~