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2.4.22nd-LevelBootloaders
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
suchasCodeComposerStudio.
ForthePCIhostboot,theCPUisoutofreset,butitexecutesanIDLEinstructionuntilaDSPinterrupt
isgeneratedbythehost.ThehostcangenerateaDSPinterruptthroughthePCIperipheralbysetting
theDSPINTbitintheBack-EndApplicationInterruptEnableSetRegister(PCIBINTSET)andthe
StatusSetRegister(PCISTATSET).
NotethattheHPIhostbootisahardwarebootmodewhilethePCIhostbootisasoftwarebootmode.
IfPCIbootisselected,theon-chipbootloaderconfiguresthePLL1ControllersuchthatCLKIN1is
multipliedby15.Morespecifically,PLLMissetto0Eh(x15)andRATIOissetto0(÷1)inthePLL1
MultiplierControlRegister(PLLM)andPLL1Pre-DividerRegister(PREDIV),respectively.TheCLKIN1
frequencymustnotbegreaterthan50MHzsothatthemaximumspeedoftheinternalROM,750
MHz,isnotviolated.TheCFGGP[2:0]pinsmustbesetto000bduringresetforproperoperationofthe
PCIbootmode.
Asmentionedpreviously,aDSPinterruptmustbegeneratedattheendofthehostbootprocessto
beginexecutionoftheloadedapplication.SincetheDSPinterruptgeneratedbytheHPIandPCIis
mappedtotheEDMAeventDSP_EVT(DMAchannel0),itwillgetrecordedinbit0oftheEDMA
EventRegister(ER).ThiseventmustbeclearedbysoftwarebeforetriggeringtransfersonDMA
channel0.
•EMIFA8-bitROMboot(BOOTMODE[3:0]=0100b)
Afterreset,thedevicewillbeginexecutingsoftwareoutofanAsynchronous8-bitROMlocatedin
EMIFACE3spaceusingthedefaultsettingsintheEMIFAregisters.Thisbootmodeisahardware
bootmode.
•MasterI2Cboot(BOOTMODE[3:0]=0101b)
Afterreset,theDSPcanactasamastertotheI2CbusandcopydatafromanI2CEEPROMora
deviceactingasanI2CslavetotheDSPusingapredefinedboottableformat.Thedestination
addressandlengtharecontainedwithintheboottable.Thisbootmodeisasoftwarebootmode.
•SlaveI2Cboot(BOOTMODE[3:0]=0110b)
ASlaveI2Cbootisalsoimplemented,whichprogramstheDSPasanI2CSlaveandsimplywaitsfora
Mastertosenddatausingastandardboottableformat.
UsingtheSlaveI2Cboot,asingleDSPoradeviceactingasanI2CMastercansimultaneouslyboot
multipleslaveDSPsconnectedtothesameI2Cbus.NotethattheMasterDSPmayrequirebooting
viaanI2CEEPROMbeforeactingasaMasterandbootingotherDSPs.
TheSlaveI2Cbootisasoftwarebootmode.
Anyofthebootmodescanbeusedtodownloada2nd-levelbootloader.A2nd-levelbootloaderallowsfor
anylevelofcustomizationtocurrentbootmethodsaswellasdefinitionofacompletelycustomizedboot.
TIoffersafew2nd-levelbootloaders,suchasanEMACbootloader,whichcanbeloadedusingthe
MasterI2Cboot.
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