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1
3
4
MDCLK
MDIO
(input)
1
7
MDCLK
MDIO
(output)
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
7.14.4.3MDIOElectricalData/Timing
Table7-90.TimingRequirementsforMDIOInput(R)(G)MII(seeFigure7-71)
-720
-850
NO.UNIT
-1000
MINMAX
1t
c(MDCLK)
Cycletime,MDCLK400ns
2at
w(MDCLK)
Pulseduration,MDCLKhigh180ns
2bt
w(MDCLK)
Pulseduration,MDCLKlow180ns
3t
t(MDCLK)
Transitiontime,MDCLK5ns
4t
su(MDIO-MDCLKH)
Setuptime,MDIOdatainputvalidbeforeMDCLKhigh10ns
5t
h(MDCLKH-MDIO)
Holdtime,MDIOdatainputvalidafterMDCLKhigh10ns
Figure7-71.MDIOInputTiming
Table7-91.SwitchingCharacteristicsOverRecommendedOperatingConditionsforMDIOOutput
(seeFigure7-72)
-720
-850
NO.PARAMETERUNIT
-1000
MINMAX
7t
d(MDCLKL-MDIO)
Delaytime,MDCLKlowtoMDIOdataoutputvalid100ns
Figure7-72.MDIOOutputTiming
204C64x+PeripheralInformationandElectricalSpecificationsSubmitDocumentationFeedback