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7.12Host-PortInterface(HPI)Peripheral
7.12.1HPIDevice-SpecificInformation
7.12.2HPIPeripheralRegisterDescription(s)
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
TheC6454deviceincludesauser-configurable16-bitor32-bitHost-portinterface(HPI16/HPI32).The
AEA14pincontrolstheHPI_WIDTH,allowingtheusertoconfiguretheHPIasa16-bitor32-bitperipheral.
SoftwarehandshakingviatheHRDYbitoftheHostPortControlRegister(HPIC)isnotsupportedonthe
C6454.
AnHPIbootisterminatedusingaDSPinterrupt.TheDSPinterruptisregisteredinbit0(channel0)ofthe
EDMAEventRegister(ER).ThiseventmustbeclearedbysoftwarebeforetriggeringtransfersonDMA
channel0.
Table7-54.HPIControlRegisters
HEXADDRESSRANGEACRONYMREGISTERNAMECOMMENTS
02880000-Reserved
PWREMU_MGMThasboth
02880004PWREMU_MGMTHPIpowerandemulationmanagementregister
Host/CPUread/writeaccess.
02880008-02880024-Reserved
02880028-Reserved
0288002C-Reserved
TheHostandtheCPUhave
02880030HPICHPIcontrolregisterread/writeaccesstothe
HPICregister.
(1)
HPIAHPIaddressregister
TheHosthasread/write
02880034
(HPIAW)
(2)
(Write)
accesstotheHPIAregisters.
TheCPUhasonlyread
HPIAHPIaddressregister
02880038
accesstotheHPIAregisters.
(HPIAR)
(2)
(Read)
0288000C-028B007F-Reserved
02880080-028BFFFF-Reserved
(1)TheCPUcanwrite1totheHINTbittogenerateaninterrupttothehostanditcanwrite1totheDSPINTbittoclear/acknowledgean
interruptfromthehost.
(2)Therearetwo32-bitHPIAregisters:HPIARforreadoperationsandHPIAWforwriteoperations.TheHPIcanbeconfiguredsuchthat
HPIARandHPIAWactasasingle32-bitHPIA(single-HPIAmode)orastwoseparate32-bitHPIAs(dual-HPIAmode)fromthe
perspectiveofthehost.TheCPUcanaccessHPIAWandHPIARindependently.FordetailsabouttheHPIAregistersandtheirmodes,
seetheTMS320C645xDSPHostPortInterface(HPI)User'sGuide(literaturenumberSPRU969).
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