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7.14EthernetMAC(EMAC)
Configuration Bus
DMA Memory
Transfer Controller
Peripheral Bus
EMAC Control Module
EMAC Module MDIO Module
MDIO Bus
EMAC/MDIO
Interrupt
Interrupt
Controller
Ethernet Bus
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
TheEthernetMediaAccessController(EMAC)moduleprovidesanefficientinterfacebetweentheC6454
DSPcoreprocessorandthenetworkedcommunity.TheEMACsupports10Base-T(10Mbits/second
[Mbps]),and100BaseTX(100Mbps),ineitherhalf-orfull-duplexmode,and1000BaseT(1000Mbps)in
full-duplexmode,withhardwareflowcontrolandquality-of-service(QOS)support.
TheEMACmoduleconformstotheIEEE802.3-2002standard,describingthe“CarrierSenseMultiple
AccesswithCollisionDetection(CSMA/CD)AccessMethodandPhysicalLayer”specifications.TheIEEE
802.3standardhasalsobeenadoptedbyISO/IECandre-designatedasISO/IEC8802-3:2000(E).
Deviationfromthisstandard,theEMACmoduledoesnotusetheTransmitCodingErrorsignalMTXER.
Insteadofdrivingtheerrorpinwhenanunderflowconditionoccursonatransmittedframe,theEMACwill
intentionallygenerateanincorrectchecksumbyinvertingtheframeCRC,sothatthetransmittedframe
willbedetectedasanerrorbythenetwork.
TheEMACcontrolmoduleisthemaininterfacebetweenthedevicecoreprocessor,theMDIOmodule,
andtheEMACmodule.TherelationshipbetweenthesethreecomponentsisshowninFigure7-58.The
EMACcontrolmodulecontainsthenecessarycomponentstoallowtheEMACtomakeefficientuseof
devicememory,plusitcontrolsdeviceinterrupts.TheEMACcontrolmoduleincorporates8K-bytesof
internalRAMtoholdEMACbufferdescriptors.Therelationshipbetweenthesethreecomponentsis
showninFigure7-58.
Figure7-58.EMAC,MDIO,andEMACControlModules
FormoredetailedinformationontheEMAC/MDIO,seetheTMS320C645xDSPEMAC/MDIOModule
ReferenceGuide(literaturenumberSPRU975).
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