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7.16.2PCIPeripheralRegisterDescription(s)
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
Table7-97.PCIConfigurationRegisters
PCIHOSTACCESS
ACRONYMPCIHOSTACCESSREGISTERNAME
HEXADDRESSOFFSET
0x00PCIVENDEVVendorID/DeviceID
0x04PCICSRCommand/Status
0x08PCICLREVClassCode/RevisionID
0x0CPCICLINEBIST/HeaderType/LatencyTimer/CachelineSize
0x10PCIBAR0BaseAddress0
0x14PCIBAR1BaseAddress1
0x18PCIBAR2BaseAddress2
0x1CPCIBAR3BaseAddress3
0x20PCIBAR4BaseAddress4
0x24PCIBAR5BaseAddress5
0x28-0x2B-Reserved
0x2CPCISUBIDSubsystemVendorID/SubsystemID
0x30-Reserved
0x34PCICPBPTRCapabilitiesPointer
0x38-0x3B-Reserved
0x3CPCILGINTMaxLatency/MinGrant/InterruptPin/InterruptLine
0x40-0x7F-Reserved
C64x+PeripheralInformationandElectricalSpecifications 208SubmitDocumentationFeedback