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TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
Table3-1.C6454DeviceConfigurationPins(AEA[19:0],ABA[1:0],andPCI_EN)(continued)
CONFIGURATIONIPD/
NO.FUNCTIONALDESCRIPTION
PINIPU
(1)
HPIperipheralbuswidthselect(HPI_WIDTH).
0HPIoperatesinHPI16mode(default).
HPIbusis16bitswide;HD[15:0]pinsareusedandtheremainingHD[31:16]
pinsarereservedpinsintheHi-Zstate.
AEA14R25IPD
1HPIoperatesinHPI32mode.
HPIbusis32bitswide;HD[31:0]pinsareused.
AppliesonlywhenHPIfunctionofHPI/PCImultiplexedpinsisselected(PCI_ENpin=0).
DeviceEndianmode(LENDIAN).
AEA13R27IPU0SystemoperatesinBigEndianmode.
1SystemoperatesinLittleEndianmode(default).
ForproperC6454deviceoperation,thispinmustbeexternallypulleddownwitha1-kΩ
AEA12R28IPD
resistoratdevicereset.
ForproperC6454deviceoperation,thispinmustbeexternallypulleddownwitha1-kΩ
AEA11T25IPD
resistoratdevicereset.
EMACInterfaceSelects(MACSEL[1:0]).
ThesepinsselecttheinterfaceusedbytheEMAC/MDIOperipheral.
0010/100EMAC/MDIOwithMIIInterface[default]
[M25,
0110/100EMAC/MDIOwithRMIIInterface
AEA[10:9]IPD
M27]
1010/100/1000EMAC/MDIOwithGMIIInterface
1110/100/1000EMAC/MDIOwithRGMIIInterface
FormoredetailedinformationontheMAC_SEL[1:0]controlpinselections,seeTable3-3.
PCII2CEEPROMAuto-Initialization(PCI_EEAI).
PCIauto-initializationviaexternalI2CEEPROM
0PCIauto-initializationthroughexternalI2CEEPROMisdisabled.ThePCI
peripheralusesthespecifiedPCIdefaultvalues(default).
AEA8P25IPD
1PCIauto-initializationthroughexternalI2CEEPROMisenabled.ThePCI
peripheralisconfiguredthroughexternalI2CEEPROMprovidedthePCI
peripheralpinsareenabled(PCI_EN=1).
Note:IfthePCIpinfunctionisdisabled(PCI_ENpin=0),thispinmustnotbepulledup.
AEA7N27IPDForproperC6454deviceoperation,donotopposetheIPDonthispin.
PCIFrequencySelection(PCI66).
SelectstheoperatingfrequencyofthePCI(either33MHzor66MHz).
0PCIoperatesat33MHz(default)
AEA6U27IPD
1PCIoperatesat66MHz
Note:IfthePCIpinfunctionisdisabled(PCI_ENpin=0),thispinmustnotbepulledup.
McBSP1pinfunctionenablebit(MCBSP1_EN).
SelectswhichfunctionisenabledontheMcBSP1/GPIOmultiplexedpins.
0GPIOpinfunctionenabled(default).
AEA5U28IPD
ThismeansallmultiplexedMcBSP1/GPIOpinsfunctionasGPIOpins.
1McBSP1pinfunctionenabled.
ThismeansallmultiplexedMcBSP1/GPIOpinsfunctionasMcBSP1pins.
SYSCLKOUTEnablebit(SYSCLKOUT_EN).
SelectswhichfunctionisenabledontheSYSCLK4/GP[1]muxedpin.
AEA4T28IPD
0GP[1]pinfunctionisenabled(default)
1SYSCLK4pinfunctionisenabled
ForproperC6454deviceoperation,theAEA3pinmustbepulleddowntoV
SS
usinga1-kΩ
AEA3T27IPD
resistor.
ConfigurationGeneral-PurposeInputs(CFGGP[2:0])
[T26,
ThevalueofthesepinsislatchedtotheDeviceStatusRegisterfollowingdeviceresetandis
AEA[2:0]U26,IPD
usedbytheon-chipbootloaderforsomebootmodes.Formoreinformationontheboot
U25]
modes,seeSection2.4,BootSequence.
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