Texas Instruments TMS320C6454 Computer Hardware User Manual


 
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PRODUCT PREVIEW
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311AAPRIL2006REVISEDDECEMBER2006
TheC64x+DSPcoreemployseightfunctionalunits,tworegisterfiles,andtwodatapaths.Liketheearlier
C6000devices,twooftheseeightfunctionalunitsaremultipliersor.Munits.EachC64x+.Munitdoubles
themultiplythroughputversustheC64xcorebyperformingfour16-bitx16-bitmultiply-accumulates
(MACs)everyclockcycle.Thus,eight16-bitx16-bitMACscanbeexecutedeverycycleontheC64x+
core.Ata1-GHzclockrate,thismeans800016-bitMMACscanoccureverysecond.Moreover,each
multiplierontheC64x+corecancomputeone32-bitx32-bitMACorfour8-bitx8-bitMACseveryclock
cycle.
TheC6454DSPintegratesalargeamountofon-chipmemoryorganizedasatwo-levelmemorysystem.
Thelevel-1(L1)programanddatamemoriesontheC6454deviceare32KBeach.Thismemorycanbe
configuredasmappedRAM,cache,orsomecombinationofthetwo.Whenconfiguredascache,L1
program(L1P)isadirectmappedcachewhereasL1data(L1D)isatwo-waysetassociativecache.The
level2(L2)memoryissharedbetweenprogramanddataspaceandis1048KBinsize.L2memorycan
alsobeconfiguredasmappedRAM,cache,orsomecombinationofthetwo.TheC64x+Megamodule
alsohasa32-bitperipheralconfiguration(CFG)port,aninternalDMA(IDMA)controller,asystem
componentwithreset/bootcontrol,interrupt/exceptioncontrol,apower-downcontrol,andafree-running
32-bittimerfortimestamp.
Theperipheralsetincludes:aninter-integratedcircuitbusmodule(I2C);twomultichannelbufferedserial
ports(McBSPs);auser-configurable16-bitor32-bithost-portinterface(HPI16/HPI32);aperipheral
componentinterconnect(PCI);a16-pingeneral-purposeinput/outputport(GPIO)withprogrammable
interrupt/eventgenerationmodes;an10/100/1000Ethernetmediaaccesscontroller(EMAC),which
providesanefficientinterfacebetweentheC6454DSPcoreprocessorandthenetwork;amanagement
datainput/output(MDIO)module(alsopartoftheEMAC)thatcontinuouslypollsall32MDIOaddressesin
ordertoenumerateallPHYdevicesinthesystem;agluelessexternalmemoryinterface(64-bitEMIFA),
whichiscapableofinterfacingtosynchronousandasynchronousperipherals;anda32-bitDDR2SDRAM
interface.
TheI2CportsontheC6454allowstheDSPtoeasilycontrolperipheraldevicesandcommunicatewitha
hostprocessor.Inaddition,thestandardmultichannelbufferedserialport(McBSP)maybeusedto
communicatewithserialperipheralinterface(SPI)modeperipheraldevices.
TheC6454hasacompletesetofdevelopmenttoolswhichincludes:anewCcompiler,anassembly
optimizertosimplifyprogrammingandscheduling,andaWindows®debuggerinterfaceforvisibilityinto
sourcecodeexecution.
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