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PRODUCT PREVIEW
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
Table2-3.TerminalFunctions(continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NAMENO.
EMIFA(64-BIT)-ADDRESS
AEA19/BOOTMODE3N25EMIFAexternaladdress(wordaddress)(O/Z)
ControlsinitializationoftheDSPmodesatreset(I)viapullup/pulldownresistors
AEA18/BOOTMODE2L26
[Formoredetailedinformation,seeSection3,DeviceConfiguration.]
AEA17/BOOTMODE1L25
Note:Ifaconfigurationpinmustberoutedoutfromthedevice,theinternal
O/ZIPD
pullup/pulldown(IPU/IPD)resistorshouldnotbereliedupon;TIrecommends
AEA16/BOOTMODE0P26
theuseofanexternalpullup/pulldownresistor.
AEA15/AECLKIN_SELP27
•Bootmode-devicebootmodeconfigurations(BOOTMODE[3:0])[Note:
AEA14/HPI_WIDTHR25
theperipheralmustbeenabledtousetheparticularbootmode.]
AEA13/LENDIANR27O/ZIPU
AEA[19:16]:
0000-Noboot(defaultmode)
AEA12R28
0001-Hostboot(HPI)
0010-Reserved
0011-Reserved
0100-EMIFA8-bitROMboot
0101-MasterI2Cboot
0110-SlaveI2Cboot
0111-Hostboot(PCI)
1000thru1111-Reserved
Formoredetailedinformationonthebootmodes,seeSection2.4,Boot
Sequence.
CFGGP[2:0]pinsmustbesetto000bduringresetforproperoperationof
thePCIbootmode.
•EMIFAinputclocksourceselect
ClockmodeselectforEMIFA(AECLKIN_SEL)
AEA15:
0-AECLKIN(defaultmode)
O/ZIPD
1-SYSCLK4(CPU/x)ClockRate.TheSYSCLK4clockrateissoftware
AEA11T25
selectableviatheSoftwarePLL1Controller.Bydefault,SYSCLK4is
selectedasCPU/8clockrate.
•HPIperipheralbuswidth(HPI_WIDTH)select
[AppliesonlywhenHPIisenabled;PCI_ENpin=0]
AEA14:
0-HPIoperatesasanHPI16(default).(HPIbusis16bitswide.HD[15:0]
pinsareusedandtheremainingHD[31:16]pinsarereservedpinsinthe
Hi-Zstate.)
1-HPIoperatesasanHPI32.
•DeviceEndianmode(LENDIAN)
AEA13:
0-SystemoperatesinBigEndianmode
1-SystemoperatesinLittleEndianmode(default)
Note:ForproperC6454deviceoperation,theAEA12andAEA11pinsmust
beexternallypulleddownwitha1-kΩresistoratdevicereset.
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