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3.4.2PeripheralConfigurationRegister0Description
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
ThePeripheralConfigurationRegister(PERCFG0)isusedtochangethestateoftheperipherals.One
writeisallowedtothisregisterwithin16SYSCLK3cyclesafterthecorrectkeyiswrittentothePERLOCK
register.
NOTE
TheinstructionsthatwritetothePERLOCKandPERCFG0registersmustbeinthesame
fetchpacketifcodeisbeingexecutedfromexternalmemory.Iftheinstructionsarein
differentfetchpackets,fetchingthesecondinstructionfromexternalmemorymaystallthe
instructionlongenoughsuchthatPERCFG0registerwillbelockedbeforetheinstruction
isexecuted.
3124
Reserved
R/W-0
23212019181716
ReservedPCICTLReservedHPICTLReservedMcBSP1CTL
R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0
15141312111098
ReservedMcBSP0CTLReservedI2CCTLReservedGPIOCTLReservedTIMER0CTL
R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0R/W-0
765430
ReservedTIMER1CTLReservedEMACCTLReserved
R/W-0R/W-0R/W-0R/W-0R/W-0
LEGEND:R/W=Read/Write;-n=valueafterreset
Figure3-4.PeripheralConfigurationRegister0(PERCFG0)-0x02AC0008
Table3-7.PeripheralConfigurationRegister0(PERCFG0)FieldDescriptions
BitFieldValueDescription
31:21ReservedReserved.
20PCICTLModecontrolforPCI.Thisbitdefaultsto1whenHostbootisused(BOOTMODE[3:0]=0111b).
0SetPCItodisabledmode
1SetPCItoenabledmode
19ReservedReserved.
18HPICTLModecontrolforHPI.Thisbitdefaultsto1whenHostbootisused(BOOTMODE[3:0]=0001b).
0SetHPItodisabledmode
1SetHPItoenabledmode
17Reserved1Reserved.
16McBSP1CTLModecontrolforMcBSP1
0SetMcBSP1todisabledmode
1SetMcBSP1toenabledmode
15ReservedReserved.
14McBSP0CTLModecontrolforMcBSP0
0SetMcBSP0todisabledmode
1SetMcBSP0toenabledmode
13ReservedReserved.
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