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7.13.1McBSPDevice-SpecificInformation
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
TheCLKSsignalissharedbybothMcBSP0andMcBSP1onthisdevice.Also,theCLKGDVfieldofthe
SampleRateGeneratorRegister(SRGR)mustalwaysbesettoavalueof1orgreater.
TheMcBSPDataReceiveRegister(DRR)andDataTransmitRegister(DXR)canbeaccessedthrough
twoseparatebusses:aconfigurationbusandadatabus.BothpathscanbeusedbytheCPUandthe
EDMA.ThedatabusshouldbeusedtoservicetheMcBSPasthispathprovidesbetterperformance.
However,sincethedatapathsharesabridgewiththePCIperipheral(seeFigure4-1),theconfiguration
pathshouldbeusedincaseswherethisperipheralisbeingusedtoavoidanyperformancedegradation.
NotethatthePCIperipheralconsistsofanindependentmasterandslave.Performancedegradationis
onlyaconcernwhenthisperipheralisusedtoinitiatetransactionsontheexternalbus.
7.13.1.1McBSPPeripheralRegisterDescription(s)
Table7-57.McBSP0Registers
HEXADDRESSRANGEACRONYMREGISTERNAMECOMMENTS
TheCPUandEDMA3
controllercanonlyread
028C0000DRR0McBSP0DataReceiveRegisterviaConfigurationBus
thisregister;theycannot
writetoit.
30000000DRR0McBSP0DataReceiveRegisterviaEDMA3Bus
028C0004DXR0McBSP0DataTransmitRegisterviaConfigurationBus
30000010DXR0McBSP0DataTransmitRegisterviaEDMABus
028C0008SPCR0McBSP0SerialPortControlRegister
028C000CRCR0McBSP0ReceiveControlRegister
028C0010XCR0McBSP0TransmitControlRegister
028C0014SRGR0McBSP0SampleRateGeneratorregister
028C0018MCR0McBSP0MultichannelControlRegister
McBSP0EnhancedReceiveChannelEnable
028C001CRCERE00
Register0PartitionA/B
McBSP0EnhancedTransmitChannelEnable
028C0020XCERE00
Register0PartitionA/B
028C0024PCR0McBSP0PinControlRegister
McBSP0EnhancedReceiveChannelEnable
028C0028RCERE10
Register1PartitionC/D
McBSP0EnhancedTransmitChannelEnable
028C002CXCERE10
Register1PartitionC/D
McBSP0EnhancedReceiveChannelEnable
028C0030RCERE20
Register2PartitionE/F
McBSP0EnhancedTransmitChannelEnable
028C0034XCERE20
Register2PartitionE/F
McBSP0EnhancedReceiveChannelEnable
028C0038RCERE30
Register3PartitionG/H
McBSP0EnhancedTransmitChannelEnable
028C003CXCERE30
Register3PartitionG/H
028C0040-028FFFFF-Reserved
C64x+PeripheralInformationandElectricalSpecifications 178SubmitDocumentationFeedback