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3.5DeviceStatusRegisterDescription
TMS320C6454
Fixed-PointDigitalSignalProcessor
SPRS311A–APRIL2006–REVISEDDECEMBER2006
Thedevicestatusregisterdepictsthedeviceconfigurationselectedupondevicereset.Onceset,these
bitswillremainsetuntiladevicereset.Fortheactualregisterbitnamesandtheirassociatedbitfield
descriptions,seeFigure3-10andTable3-13.
NotethatenablingordisablingperipheralsthroughthePeripheralConfigurationRegisters(PERCFG0and
PERCFG1)doesnotaffecttheDEVSTATregister.Todeterminethestatusofperipheralsfollowingwrites
tothePERCFG0andPERCFG1registers,readthePeripheralsStatusRegisters(PERSTAT0and
PERSTAT1).
3124
Reserved
R-00000000
2322212019181716
ReservedEMIFA_ENDDR2_ENPCI_ENCFGGP2CFGGP1CFGGP0Reserved
R-0R-xR-xR-xR-xR-xR-xR-1
15141312111098
SYSCLKOUT_
MCBSP1_ENPCI66ReservedPCI_EEAIMAC_SEL1MAC_SEL0Reserved
EN
R-xR-xR-xR-0R-xR-xR-xR-1
76543210
ReservedLENDIANHPI_WIDTHAECLKINSELBOOTMODE3BOOTMODE2BOOTMODE1BOOTMODE0
R-0R-xR-xR-xR-xR-xR-xR-x
LEGEND:R/W=Read/Write;R=Readonly;-x=valueafterreset
Figure3-10.DeviceStatusRegister(DEVSTAT)-0x02A80000
Table3-13.DeviceStatusRegister(DEVSTAT)FieldDescriptions
BitFieldValueDescription
31:23ReservedReserved.Read-only,writeshavenoeffect.
22EMIFA_ENEMIFAEnable(EMIFA_EN)statusbit
ShowsthestatusofwhethertheEMIFAperipheralpinsareenabled/disabled.
0EMIFAperipheralpinsaredisabled(default)
1EMIFAperipheralpinsareenabled
21DDR2_ENDDR2MemoryControllerEnable(DDR2_EN)statusbit
ShowsthestatusofwhethertheDDR2MemoryControllerperipheralpinsareenabled/disabled.
0DDR2MemoryControllerperipheralpinsaredisabled(default)
1DDR2MemoryControllerperipheralpinsareenabled
20PCI_ENPCIEnable(PCI_EN)statusbit
ShowsthestatusofwhichfunctionisenabledontheHPI/PCImultiplexedpins.
0HPIpinfunctionsareenabled(default)
1PCIpinfunctionsareenabled
19:17CFGGP[2:0]UsedasGeneral-Purposeinputsforconfigurationpurposes.
Thesepinsarelatchedatreset.ThesevaluescanbeusedbyS/Wroutinesforbootoperations.
16ReservedReserved.Read-only,writeshavenoeffect.
15SYSCLKOUT_ENSYSCLKOUTEnable(SYSCLKOUT_EN)statusbit
ShowsthestatusofwhichfunctionisenabledontheSYSCLK4/GP[1]muxedpin.
0GP[1]pinfunctionoftheSYSCLK4/GP[1]pinenabled(default)
1SYSCLK4pinfunctionoftheSYSCLK4/GP[1]pinenabled
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