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Processor: Exception Handling
Katana
®
752i User’s Manual 10006024-04
4-8
EXCEPTION HANDLING
Each CPU exception type transfers control to a different address in the vector table. The
vector table normally occupies the first 2000 bytes of RAM (with a base address of
0000,0000
16
) or ROM (with a base address of F800,0000
16
). An unassigned vector position
may be used to point to an error routine or for code or data storage.
Table 4-4 lists the
exceptions recognized by the processor from the lowest to highest priority.
Table 4-4: 750GL Exception Priorities
Exception:
Vector Address
Hex Offset: Notes:
Trace 00D00 Lowest priority. Due to MSR[SE]=1 or MSR[BE]=1 for
branches.
Data Storage (DSI) 00300 DABR address match.
TLB page protection violation.
Any access except cache operations to T=1 (bit 5 of
DSISR) or T=0->T=1 crossing.
BAT page protection violation.
Due to eciwx, ecowx with EAR(E)=0 (bit 11 of
DSIDSR).
Alignment 00600 Any alignment exception condition.
Program (PI) 00700 Due to a floating-point enabled exception.
Due to an illegal instruction, a privileged instruction,
or a trap.
Floating Point Unavailable (FPA) 00800 Any floating-point unavailable exception.
System call (SC) 00C00 Execution of system call (sc) instruction.
Instruction Address Breakpoint
(IABR)
01300 Any IABR exception condition.
Instruction Storage (ISI) 00400 Instruction fetch exceptions.
Thermal Management (TMI) 01700 Junction temperature exceeds the threshold
specified in THRM1 or THRM2, and MSR[EE]=1.
Decrementer (DEC) 00900 Decrementer passed through zero.
Performance Monitor (PFM) 00F00 Programmer-specified.
External (EI) 00500 INT* (Refer to Section for description of interrupt
sources and interrupt handling.)
System Management (SMI) 01400 MSR[EE]=1 and SMI* is asserted.
Machine check 00200 Assertion of TEA*, 60x Address Parity Error, 60x Data
Parity Error, L2 ECC Double Bit Error, MCP*, L2-Tag
Parity Error, D-Tag Parity Error, I-Tag Parity Error, I-
Cache Parity Error, D-Cache Parity Error, or locked L2
snoop hit.
System reset 00100 Soft reset (SRESET*).
Highest priority. Hard reset (HRESET* and POR).