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User’s Manual 105
7.13 Input Capture
The two-channel Input Capture can be used to time input signals from various port pins.
Each Input Capture channel consists of a sixteen-bit counter that is clocked by the output
of Timer A8, and can be connected to one or two out of sixteen parallel port pins. The
Input Capture channel captures the state of its counter upon either of two programmed
conditions and can then generate an interrupt. The programmed conditions can also be
used to start and stop the counter.
Because the Input Capture channels synchronize their inputs to the peripheral clock (fur-
ther divided by Timer A8), there is some delay between the input transition and when an
interrupt is requested, as shown below. The status bits in the ICSxR are set coincident with
the interrupt request and are reset when read from the ICSxR.
Each Input Capture channel has two inputs, called the Start condition and the Stop condi-
tion. Each of these two inputs can be programmed to come from one of four bits (bits 1, 3,
5 or 7) in Parallel Port C, D, F or G. The two inputs can come from the same or different
pins, and are edge-sensitive. Each input can be disabled, rising-edge-sensitive, falling-
edge-sensitive or responsive to either edge polarity. Either or both inputs can generate an
Input Capture interrupt, and either or both inputs can cause the current count to be latched.
Register Name Mnemonic I/O Address R/W Reset
Input Capture Ctrl/Status Register ICCSR 0x56 R/W 00000000
Input Capture Control Register ICCR 0x57 W xxxxxx00
Input Capture Trigger 1 Register ICT1R 0x58 W 00000000
Input Capture Source 1 Register ICS1R 0x59 W xxxxxxxx
Input Capture LSB 1 Register ICL1R 0x5A R xxxxxxxx
Input Capture MSB 1 Register ICM1R 0x5B R xxxxxxxx
Input Capture Trigger 2 Register ICT2R 0x5C W 00000000
Input Capture Source 2 Register ICS2R 0x5D W xxxxxxxx
Input Capture LSB 2 Register ICL2R 0x5E R xxxxxxxx
Input Capture MSB 2 Register ICM2R 0x5F R xxxxxxxx
CPT input
Interrupt
Peri Clock
Timer A8