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112 Rabbit 3000 Microprocessor
Table 7-25. Quadrature Decoder Control/Status Register
Quad Decode Control/Status Register (QDCSR) (Address = 0x90)
Bit(s) Value Description
7 0 Quadrature Decoder 2 did not increment from 0xFF.
(read-only) 1
Quadrature Decoder 2 incremented from 0xFF to 0x00. This bit is cleared by a
read of his register.
6 0 Quadrature Decoder 2 did not decrement from 0x00.
(read-only) 1
Quadrature Decoder 2 decremented from 0x00 to 0xFF. This bit is cleared by a
read of this register.
5 This bit always reads as zero.
4 0 No effect on the Quadrature Decoder 2.
(write-only) 1 Reset Quadrature Decoder 2 to 0x00 without causing an interrupt.
3 0 Quadrature Decoder 1 did not increment from 0xFF.
(read-only) 1
Quadrature Decoder 1 incremented from 0xFF to 0x00. This bit is cleared by a
read of this register.
2 0 Quadrature Decoder 1 did not decrement from 0x00.
(read-only) 1
Quadrature Decoder 1 decremented from 0x00 to 0xFF. This bit is cleared by a
read of this register.
1 This bit always reads as zero.
0 0 No effect on the Quadrature Decoder 1.
(write-only) 1 Reset Quadrature Decoder 1 to 0x00 without causing an interrupt.