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User’s Manual 171
Table 12-12. Status Register Clocked Serial (Ports A-D only)
Serial Port x Status Register (SASR) (Address = 0xC3)
(SBSR) (Address = 0xD3)
(SCSR) (Address = 0xE3)
(SDSR) (Address = 0xF3)
Bit(s) Value Description (Clocked serial mode only)
7
0 The receive data register is empty
1
There is a byte in the receive buffer. The serial port will request an interrupt
while this bit is set. The interrupt is cleared when the receive buffer is empty.
6 0 This bit is always zero in clocked serial mode.
5
0 The receive buffer was not overrun.
1 The receive buffer was overrun. This bit is cleared by reading the receive buffer.
4 0 This bit is always zero in clocked serial mode.
3
0 The transmit buffer is empty.
1
The transmit buffer is not empty. The serial port will request an interrupt when
the transmitter takes a byte from the transmit buffer. Transmit interrupts are
cleared when the transmit buffer is written, or any value (which will be ignored)
is written to this register.
2
0 The transmitter is idle.
1
The transmitter is sending a byte. An interrupt is generated when the transmitter
clears this bit, which occurs only if the transmitter is ready to start sending
another byte but the transmit buffer is empty.
1:0 00 These bits are always zero in clocked serial mode.