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186 Rabbit 3000 Microprocessor
Figure 12-8 shows the timing relationship among perclk, the external serial clock, and
data receive. Note that RxA is sampled by the rising edge of perclk.
Figure 12-8. Synchronous Serial Data Receive Timing with External Clock (Mode 00)
When clocking the Rabbit externally, the maximum serial clock frequency is limited by
the amount of time required to synchronize the external clock with the Rabbit perclk. If
we sum the maximum number of perclk cycles required to perform clock synchroniza-
tion for each of the receive and transmit cases, then the fastest external serial clock fre-
quency would be limited to perclk/6.
Valid
perclk
CLKA
RxA
(Ext.)