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User’s Manual 65
5.5 Description of Pins with Alternate Functions
Table 5-2. Pins With Alternate Functions
Pin Name Output Function Input Function Input Capture Option
PA[7:0] SLAVE D[7:0], ID[7:0] SLAVE D[7:0], ID[7:0]
PB7 SLAVEATTN, IA5
PB6 IA4
/ASCS
*
PB5 IA3 SD1
PB4 IA2 SD0
PB3 IA1 /SRD
PB2 IA0 /SWR
PB1 CLKA CLKA
PB0 CLKB CLKB
PC7 n/a RXA yes
PC6 TXA n/a
PC5 n/a RXB yes
PC4 TXB n/a
PC3 n/a RXC yes
PC2 TXC n/a
PC1 n/a RXD yes
PC0 TXD n/a
PD7
APWM3
*
ARXA yes
PD6 ATXA
PD5
APWM2
*
ARXB yes
PD4 ATXB
PD3 yes
PD2
PD1 yes
PD0
PE7 I7 /SCS (slave chip select)
PE6 I6
PE5 I5 INT1B
PE4 I4 INT0B
PE3 I3
PE2 I2
PE1 I1 INT1A
PE0 I0 INT0A