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4-134
4.14.39 MULR Multiply (Rounded) With No Data Transfer
Syntax
[label] name src Clock, clk Word, w With RPT, clk Class
MULR {adrs} Table 4–0–46 Table 4–0–46 5
Execution PH,PL ⇐ MR * src
PC ⇐ PC + 1
Flags Affected TAG bit is set accordingly
Opcode
Instructions 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MULR [adrs]
1 1 0 1 1 1 0 1 0 adrs
x dma16 (for direct) or offset16 (long relative) (see Section 4.13)
Description Perform multiplication of multiply register (MR) and effective data memory
value, add 08x00 to the product. The 16 MSBs of the 32-bit product are stored
in the product high (PH) register. No status change. Round upper 16 bits.
See Also MULS, MUL, MULAPL, MULSPL, MULSPLS, MULTPL, MULTPLS,
MULAPL
Example 4.14.39.1 MULR *R0++
Multiply MR with the content of data memory location pointed by R0 and store the rounded upper 16
bits of the result in PH. Increment R0 by 2.