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Individual Instruction Descriptions
4-147Assembly Language Instructions
4.14.52 OR Bitwise Logical OR
Syntax
[label] name dest, src [, src1] [, mod] Clock, clk Word, w With RPT, clk Class
OR An, {adrs} Table 4–46 Table 4–46 1b
OR An[~], An[~], imm16 [, next A] 2 2 N/R 2b
OR An[~], An~, An [, next A] 1 1 n
R
+3 3
OR TFn, {flagadrs} 1 1 N/R 8a
OR TFn, {cc} [, Rx] 1 1 n
R
+3 8b
Execution [premodify AP if mod specified]
dest ⇐ dest OR src1 (for two operands)
dest ⇐ src OR src1 (for three operands)
PC ⇐ PC + w
Flags Affected dest is An: OF, SF, ZF, CF are set accordingly
dest is TFn: TFn bits in STAT register are set accordingly
src is {adrs}: TAG bit is set accordingly
src is {flagadrs}: TAG bit is set accordingly
Opcode
Instructions 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OR An, {adrs}
0 1 0 0 0 0 0 An adrs
x dma16 (for direct) or offset16 (long relative) [see section 4.13]
OR An[~], An[~], imm16 [, next A] 1 1 1 0 0 next A An 1 0 0 0 0 1 A~ ~A
OR An[~], An~, An [, next A] 1 1 1 0 0 next A An 0 1 0 0 1 0 A~ ~A
OR TFn, {flagadrs} 1 0 0 1 1 fig Not 0 1 0 flagadrs
OR TFn, {cc} [, Rx] 1 0 0 1 0 fig Not cc Rx 0 1
Description Bitwise OR of src and dest. Result is stored in dest. If three operands are
specified then logical OR src and src1, store result in dest. Premodification of
accumulator pointers are allowed with some operand types.
Syntax Description
OR An, {adrs} OR RAM word to An
OR An[~], An[~], imm16 [, next A] OR immediate word to An[~], store result in An[~]
OR An[~], An~, An [, next A] OR An word to An~ word, store result in An[~]
OR TFn, {flagadrs} OR TFn with memory tag, store result in TFn bit in STAT
OR TFn, {cc} [, Rx] OR test condition with TFn bit in STAT register
.
Rx must be provided if cc is
one of {RZP, RNZP, RLZP, RNLZP} to check if the selected Rx is zero or
negative. Rx should not be provided for other conditionals.