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System Registers
4-6
value of the STACK register should be stored before use and restored after
use. This register must point to the beginning of the stack in the RESET
initialization routine before any CALL instruction or maskable interrupts can be
used. CALL instructions increment R7 by 2., RET instructions decrement R7
by 2. The stack in MSP50P614/MSP50C614 is positively incremented.
4.2.11 String Register (STR)
The string register (STR) holds the length of the string used by all string instruc-
tions. MOV instructions are used to load this register to define the length of a
string. The value in this register is not altered after the execution of a string
instruction. A value of zero in this register defines a string length of 2. Thus,
a numerical value, n
s
, in the STR register, defines a string length of n
s
+2. The
maximum string length is 32. Therefore, 0 ≤ n
S
≤ 30 corresponds to actual
string lengths from 2 to 32.
4.2.12 Status Register (STAT)
The status register (STAT) provides the storage of various single bit mode
conditions and condition bits. As shown in Table 4–1, mode bits reside in the
first 5 LSBs of the status register and can be independently set or reset with
specific instructions. See section 4.6 for detail about these computational
modes. Condition bits and flags are used for conditional branches, calls, and
flag instructions. Flags and status condition bits are stored in the upper 10 bits
of the 17-bit status register. MOV instructions provide the means for context
saves and restores of the status register. The STAT should be initialized to
0000h after the processor resets.
The XSF and XZF flags are related to data flow to or from the internal data bus.
If the destination of the transfer is an accumulator, then the SF, ZF, CF and OF
flags are affected. If the destination of the transfer is Rx, the RCF and RZF
flags are affected. If the destination of the transfer is through the internal
databus, the XSF and XZF flags are affected. The SF flag is the sign flag and
it is equal to the most significant bit of an accumulator when an accumulator
instruction is executed. ZF is the zero flag and is set when the instruction
causes the accumulator value to become zero. CF is the carry flag and is set
when the instruction causes a carry. A carry is generated by addition,
subtraction, multiplication, multiply-accumulate, compare, shifting and some
MOV instructions (that have accumulation features). CF is reset if no carry
occurs after execution of an instruction. OF is set when a computation causes
overflow in the result. It is reset if no overflow occurs during an accumulator
based instruction. Overflow saturation mode is set by the OM bit as explained
in Section 4.6.