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AMD Confidential
User Manual November 21
st
, 2008
Chapter 7: Device Configuration 89
The data value, e, is always one byte (two hex digits) in width. The device will log
multiple messages for PCI configuration accesses that are greater than one byte in width.
For example, a dword read of 0x11223344 from PCI configuration register 0x40 of
device 7, function 1 on bus 0 would produce the following log messages:
PCI CONFIG READ Bus 0, Device 7, Function 1, Register 40, Data 44
PCI CONFIG READ Bus 0, Device 7, Function 1, Register 41, Data 33
PCI CONFIG READ Bus 0, Device 7, Function 1, Register 42, Data 22
PCI CONFIG READ Bus 0, Device 7, Function 1, Register 43, Data 11
Differences from Real Hardware
The Northbridge device differs from the real hardware in that the simulator does not
support the debug hardware registers. The device also does not support memory-
interleaving by node, though this will change in the near future. The device will differ in
those things that are of a timing-related nature, such as setting of bus speeds. Full probe
transactions are not modeled. Registers that deal with items outside of the testing of
transfer protocols at the register level are not functional (buffer count registers, etc.).
They are present and read/write able, but do not effect the simulation.