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AMD Confidential
User Manual November 21
st
, 2008
Appendix A 187
mem32int – Doubleword (32-bit) integer operand in memory.
mem64real – Double-precision (64-bit) floating-point operand in memory.
mem64int – Quadword (64-bit) integer operand in memory.
mem80real – Double-extended-precision (80-bit) floating-point operand in
memory.
mem80dec – 80-bit packed BCD operand in memory, containing 18 4-bit BCD
digits.
mem2env – 16-bit x87 control word or x87 status word.
mem14/28env – 14-byte or 28-byte x87 environment. The x87 environment
consists of the x87 control word, x87 status word, x87 tag word, last non-control
instruction pointer, last data pointer, and opcode of the last non-control instruction
completed.
mem94/108env – 94-byte or 108-byte x87 environment and register stack.
mem512env – 512-byte environment for 128-bit media, 64-bit media, and x87
instructions.
mmx – Quadword (64-bit) operand in an MMX™ register.
mmx1 – Quadword (64-bit) operand in an MMX register, specified as the left-
most (first) operand in the instruction syntax.
mmx2 - Quadword (64-bit) operand in an MMX register, specified as the right-
most (second) operand in the instruction syntax.
mmx/mem32 – Doubleword (32-bit) operand in an MMX register or memory.
mmx/mem64 – Quadword (64-bit) operand in an MMX register or memory.
mmx1/mem64 - Quadword (64-bit) operand in an MMX register or memory,
specified as the left-most (first) operand in the instruction syntax.
mmx2/mem64 - Quadword (64-bit) operand in an MMX register or memory,
specified as the right-most (second) operand in the instruction syntax.
moffset – Memory offset of unspecified size.
moffset8 – Operand in memory located at the specified byte (8-bit) offset from the
instruction pointer.
moffset16 - Operand in memory located at the specified word (16-bit) offset from
the instruction pointer.
moffset32 - Operand in memory located at the specified doubleword (32-bit)
offset from the instruction pointer.
pntr16:16 – Far pointer with 16-bit selector and 16-bit offset.
pntr16:32 - Far pointer with 16-bit selector and 32-bit offset.
reg – Operand of unspecified size in a GPR register.
reg8 – Byte (8-bit) operand in a GPR register.
reg16 – Word (16-bit) operand in a GPR register.
reg16/32 - Word (16-bit) or doubleword (32-bit) operand in a GPR register.
reg32 – Doubleword (32-bit) operand in a GPR register.
reg64 - Quadword (64-bit) operand in a GPR register.
reg/mem8 – Byte (8-bit) operand in a GPR register or memory.
reg/mem16 – Word (16-bit) operand in a GPR register or memory.
reg/mem32 – Doubleword (32-bit) operand in a GPR register or memory.