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2.4 System Board Troubleshooting 2 Troubleshooting Procedures
PORTEGE A200 Maintenance Manual (960-499) 2-21
Table 2-5 Debugging port status (2/7)
D port
status
Contents
F004h Changes ROM BIOS to RAM BIOS.
F005h Stores scan codes.
Sets TASK_1ms_TSC.
F0006h Inputs key.
Reads CHGBIOSA.EXE/CHGFIRMA.EXE.
FDC RESET
Sets parameters for 2HD(1.44MB) and the transmission rate.
Reads the first sector. If 1.44MB 2HD, decides.
Sets the parameter for 2DD(720KB) and the transmission rate.
Searches CHGBIOSA.EXE from the root directory.
Calculates the head and sector for start directory.
Reads one sector from the root directory.
Searches the entry of “CHGBIOSA.EXE”/”CHGFIRMA.EXE” from the
sector.
Reads the EXE header of “CHGBIOSA.EXE”/ “HGFIRMA.EXE”.
Goes to input key, when any error generates.
Executes “CHGBIOSA.EXE”/ “CHGFIRMA.EXE”.
(F003h) Prohibits cache.
Initializes special registers.
F100h
Initializes PIT channel 1 (sets the refresh interval to 30µ s.).
F101h Checks the type and size of DRAM (in Cold Boot).
Checks the DRAM size.
When the DRAM size = 0, it halts.
Tests the stack area of SM-RAM? When it can not be used for stack, it
halts.
F102h Cache configuration
Permits cache.(L1 Cache only)
Access test of CMOS (in COLD boot only).? When any error, it halts.
Checks the battery level of CMOS.
Checks the checksum of CMOS.
Initializes CMOS data (1).
Sets IRT status. (setting boot status and IRT busy flag, remaining bit =0)
Stores the DRAM size.