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18 www.xilinx.com ML361 Virtex-II Pro Memory Board
UG060 (v1.2) November 8, 2007
Chapter 2: Architecture
R
Power
Power Distribution
The ML361 board uses a 5V input voltage source to generate all the on-board voltages
(1.3V, 1.5V, 2.6V, and 3.3V, and the 2.5V for the MGTs)
Input Voltage
The input voltage is specified at 5 V @ 6.5 A. The recommended power supply is a CUI Inc.
DTS050650UTC-PSP-SZ. The jack used is a 4-pin barrel jack, CUI stack PJ-002A-SMT. The
slide switch is a CW Industries G1123-0009. This power input has alternate input solder
pads.
3.3 V Generation
The Texas Instruments PTH05000WAH voltage regulator generates the 3.3 V @ 5.5 A
power. This power input has alternate input solder pads.
2.6 V Generation
The Texas Instruments PTH05010WAS voltage regulator generates the 2.6 V @ 10 A power.
This regulator provides 2.5 Vout with ± 10% trim. This power input has alternate input
solder pads.
1.5 V Generation
The Texas Instruments PTH05000WAH voltage regulator generates the 1.5 V @ 5.5 A
power. This power input has alternate input solder pads.
1.3 V Generation
The Texas Instruments PTH05000WAH voltage regulator generates the 1.3 V @ 1.5 A
power.
Linear Regulators for the MGTs
The Texas Instruments TPS78625 voltage regulator generates 2.5 V @ 1.5 A power for the
Multi Gigabit Transceivers (MGTs).
FPGA Configuration
The Virtex-II Pro FPGA can be programmed through either the JTAG interface or three on-
board PROMs.
JTAG
Two headers are used for JTAG: a standard header and a parallel-IV header.
Standard Header
The standard JTAG header is a 1 x 7 0.100" RA header.
Parallel-IV Header
The parallel-IV headers is a 2 x 7 2 mm RA shrouded header.