Xilinx ML361 Virtex-II Pro Computer Hardware User Manual


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44 www.xilinx.com ML361 Virtex-II Pro Memory Board
UG060 (v1.2) November 8, 2007
Chapter 4: Signal Integrity Recommendations and Simulations
R
Eye Diagram of Clock Signals at Memory
Figure 4-14 shows the eye diagram for the clock signals at memory.
X-Ref Target - Figure 4-14
Figure 4-14: Eye Diagram for Clock at Memory
ug060_c5_14_091003
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