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4–84 Alpha Architecture Handbook
Compaq software may choose to initialize the software status bits and the trap disable
bits to all 1’s to avoid any initial trapping when an exception condition first occurs. Or,
software may choose to initialize those bits to all 0’s in order to provide a summary of
the exception behavior when the program terminates.
In any event, the exception bits in the FPCR are still useful to programs. A program
can clear all of the exception bits in the FPCR, execute a single floating-point
instruction, and then examine the status bits to determine which hardware-defined
exceptions the instruction encountered. For this operation to work in the presence of
various implementation options, the single instruction should be followed by a TRAPB
or EXCB instruction, and exception completion by the system software should save
and restore the FPCR registers without other modifications.
3. Because of the way the LDS and STS instructions manipulate bits <61:59> of float-
ing-point registers, they should not be used to manipulate FPCR values.
4.7.9 Floating-Point Instruction Function Field Format
The function code for IEEE and VAX floating-point instructions, bits <15..5>, contain the
function field. That field is shown in Figure 4–2 and described for IEEE floating-point in Table
4–12 and for VAX floating-point in Table 4–13. Function codes for the independent float-
ing-point instructions, those with opcode 17
16
, do not correspond to the function fields below.
The function field contains subfields that specify the trapping and rounding modes that are
enabled for the instruction, the source datatype, and the instruction class.
Figure 4–2: Floating-Point Instruction Function Field
Opcode Fa Fb Fc
T
R
P
R
N
D
S
R
C
F
N
C
31 25 20 15 12 10 8 40591113162126