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System Architecture and Programming Implications 5–1
Chapter 5
System Architecture and Programming
Implications
5.1 Introduction
Portions of the Alpha architecture have implications for programming, and the system struc-
ture, of both uniprocessor and multiprocessor implementations. Architectural implications
considered in the following sections are:
• Physical address space behavior
• Caches and write buffers
• Translation buffers and virtual caches
• Data sharing
• Read/write ordering
• Arithmetic traps
To meet the requirements of the Alpha architecture, software and hardware implementors need
to take these issues into consideration.
5.2 Physical Address Space Characteristics
Alpha physical address space is divided into four equal-size regions. The regions are delin-
eated by the two most significant, implemented, physical address bits. Each region’s
characteristics are distinguished by the coherency, granularity, and width of memory accesses,
and whether the region exhibits memory-like behavior or non-memory-like behavior.
5.2.1 Coherency of Memory Access
Alpha implementations must provide a coherent view of memory, in which each write by a
processor or I/O device (hereafter, called "processor") becomes visible to all other processors.
No distinction is made between coherency of "memory space" and "I/O space."