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E–20 Alpha Architecture Handbook
9 Integer operate instructions
10 Floating point operate instructions
11 Load instructions
12 Store instructions
13 Instruction cache access
14 Data cache access
15 For the 21164, use CBOX1 event selection in Table E–15.
For the 21164PC, use PM0_MUX event selection in Table E–17.
Table E–14: 21164/21164PC Counter 2 (PCSEL2) Event Selection
The following values choose the counter 2 (PCSEL2) event selection:
Value Meaning
0 Long stalls (> 15 cycles)
1 Unused value
2 PC mispredicts
3 Branch mispredicts
4 I-cache misses
5 ITB misses
6 D-cache misses
7 DTB misses
8 Loads merged in MAF
9 LDU replays
10 WB/MAF full replays
11 Event from external pin
12 Cycles
13 Memory barrier instructions
14 LDx/L instructions
15 For the 21164, use CBOX2 event selection in Table E–16.
For the 21164PC, use PM1_MUX event selection in Table E–18.
Table E–13: 21164/21164PC Counter 1 (PCSEL1) Event Selection (Continued)
The following values choose the counter 1 (PCSEL1) event selection:
Value Meaning