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4–92 Alpha Architecture Handbook
4.8.2 Load G_floating
Format:
Operation:
va ← {Rbv + SEXT(disp)}
Fa ← (va)<15:0> || (va)<31:16> || (va)<47:32> || (va)<63:48>
Exceptions:
Instruction mnemonics:
Qualifiers:
Description:
LDG fetches a G_floating (or D_floating) datum from memory and writes it to register Fa. If
the data is not naturally aligned, an alignment exception is generated.
The virtual address is computed by adding register Rb to the sign-extended 16-bit displace-
ment. The source operand is fetched from memory, the bytes are reordered to conform to the
G_floating register format (also conforming to the D_floating register format), and the result is
then written to register Fa.
LDG Fa.wg,disp.ab(Rb.ab)
!Memory format
Access Violation
Fault on Read
Alignment
Translation Not Valid
LDG Load G_floating (Load D_floating)
None