Compaq ECQD2KCTE Laptop User Manual


 
1–6 Alpha Architecture Handbook
Floating-Point Operate Instructions
The floating-point operate instructions include four complete sets of VAX and IEEE arith-
metic instructions, plus instructions for performing conversions between floating-point and
integer quantities.
In addition to the operations found in conventional RISC architectures, Alpha includes condi-
tional move instructions for avoiding branches and merge sign/exponent instructions for simple
field manipulation.
The arithmetic trap enables and rounding mode are encoded in the function field of each
instruction, rather than kept in global state bits. That makes it easier to pipeline
implementations.
1.5 Instruction Set Characteristics
Alpha instruction set characteristics are as follows:
All instructions are 32 bits long and have a regular format.
There are 32 integer registers (R0 through R31), each 64 bits wide. R31 reads as zero,
and writes to R31 are ignored.
All integer data manipulation is between integer registers, with up to two variable regis-
ter source operands (one may be an 8-bit literal) and one register destination operand.
There are 32 floating-point registers (F0 through F31), each 64 bits wide. F31 reads as
zero, and writes to F31 are ignored.
All floating-point data manipulation is between floating-point registers, with up to two
register source operands and one register destination operand.
Instructions can move data in an integer register file to a floating-point register file, and
data in a floating-point register file to an integer register file. The instructions do not
interpret bits in the register files and do not access memory.
All memory reference instructions are of the load/store type that moves data between
registers and memory.
There are no branch condition codes. Branch instructions test an integer or floating-
point register value, which may be the result of a previous compare.
Integer and logical instructions operate on quadwords.
Floating-point instructions operate on G_floating, F_floating, and IEEE extended, dou-
ble, and single operands. D_floating "format compatibility," in which binary files of
D_floating numbers may be processed, but without the last 3 bits of fraction precision,
is also provided.
A minimal number of VAX compatibility instructions are included.
1.6 Terminology and Conventions
The following sections describe the terminology and conventions used in this book.