Epson 8500 Printer User Manual


 
2.3.2 Reset Circuit
This sectiin describes the hardware reset circuit. When the hardware reset signal is input, all ICs in the
control circuit are reset, and the CPU executes the program from the starting address. Figure 2-17 shows the
reset circuit block diagram.
The circuit is equipped with a reset IC: PTS591(IC13) is used for resetting the + 5 VDC line. The reset
operation is described below.
0 Power onloff Reset:
Reset IC PTS591 (IC13) monitors the +5 VDC line on the C204 MAIN board. If it drops to 4.2 VDC or
smaller, the reset IC outputs a LOW signal to the CPU (IC2) and E05936 (ICI) gate array.
0 Forced&set:
The gate array outputs the RSTOUTX or ERRCRPFX signals to the XRESET of the CPU, and also to the
gate array aself.
0 ilNlT Signal Reset:
When the gate array receives the /INIT signal from the host computer, the signal is transferred to the INT4 of
the CPU, then CPU performs the /INIT reset operation.
“CC
“our
PST591
(IC13)
113
Type-B,
.
A b /RESETX
p Parallel I/F
/INIT signal
112
E05936
c- /RSTOUTX (IC1) IN$RQ loo
111 /ERRCRPFX
I
INT4
C561
CPU
TMP95C061
(IC2)
Figure 2-17. Reeet Circuit Block Diagram
Rev. A
2-21