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Glossary
AT-MIO-16X User Manual G-4
©
National Instruments Corporation
bus master a type of a plug-in board or controller with the ability to read and write
devices on the computer bus
C
CCelsius
cache high-speed processor memory that buffers commonly used instructions
or data to increase processing throughput
CalDAC calibration DAC
capacitively coupled
cascading process of extending the counting range of a counter chip by connecting
to the next higher counter
channel pin or wire lead to which you apply or from which you read the analog
or digital signal. Analog signals can be single-ended or differential. For
digital signals, you group channels to form ports. Ports usually consist
of either four or eight digital channels.
channel clock the clock controlling the time interval between individual channel
sampling within a scan. Boards with simultaneous sampling do not have
this clock.
chromatograph an instrument used in chemical analysis of gases and liquids.
CI computing index
circuit trigger a condition for starting or stopping clocks
clock hardware component that controls timing for reading from or writing to
groups
CMOS complementary metal-oxide semiconductor
CMRR common-mode rejection ratio—a measure of an instrument’s ability to
reject interference from a common-mode signal, usually expressed in
decibels (dB)
code width the smallest detectable change in an input voltage of a DAQ device
cold-junction a method of compensating for inaccuracies in thermocouple circuits
compensation