Index
©
National Instruments Corporation I-5 AT-MIO-16X User Manual
CH_GAIN<2..0>, 4-37 to 4-38
CLKMODEB<1..0>, 4-20 to 4-21
CNT32/16*, 4-7 to 4-8, 5-18, 5-19
CYCLICSTOP, 3-22, 4-23, 5-26
D<15..0>, 4-44, 4-45, 4-65
DAC0DSP, 4-21
DAC0REQ, 4-18 to 4-19
DAC1DSP, 4-21
DAC1REQ, 4-18
DACCMPLINT, 4-14
DACCOMP, 4-28, 5-32, 5-36
DACFIFOEF*, 4-28 to 4-29, 5-36
DACFIFOFF*, 4-28, 5-41
DACFIFOHF*, 4-28, 5-41
DACGATE, 4-22 to 4-23
DACMB<3..0>, 4-21 to 4-22
DAQCMPLINT, 4-14 to 4-15
DAQCOMP, 4-25, 5-36, 5-43
DAQEN, 4-6 to 4-7, 5-11, 5-14
DAQPROG, 4-25 to 4-26
DB_DIS, 4-23
DIOPAEN, 4-14, 5-36
DIOPBEN, 4-13, 5-36
DMACHA, 4-15
DMACHAB<2..0>, 4-11 to 4-12
DMACHB, 4-15
DMACHBB<2..0>, 4-11
DMATCA, 4-26, 5-32, 5-41, 5-43
DMATCB, 4-26 to 4-27, 5-32, 5-41, 5-43
DMATCINT, 4-14
DRVAIS, 4-19
EEPROMCD*, 4-29
EEPROMCS, 4-5
EEPROMDATA, 4-29
EISA_DMA, 4-11
EXTREFDAC0, 4-11
EXTREFDAC1, 4-11
EXTTRIG_DIS, 4-24
FIFO/DAC, 4-24
GATE2SEL, 4-24, 5-32
INTCHB<2..0>, 4-19
INTGATE, 4-6
I/O_INT, 4-15
OUT<5..1>, 4-67
OUTEN, 5-40
OVERFLOW, 4-27, 5-7, 5-22
OVERRUN, 4-27, 5-7, 5-22
RETRIG_DIS, 4-6
RSI, 4-72
RTSITRIG, 4-8
S2 through S0 bits, 5-40
SCANDIV, 4-6, 5-15
SCANEN, 4-7, 5-11, 5-14
SCLK, 4-5 to 4-6
SCN2, 4-7, 5-14
SDATA, 4-5
SRC3SEL, 4-23 to 4-24, 5-30, 5-32
TMRREQ, 4-27 to 4-28, 5-32, 5-35, 5-43
board and RTSI clock selection. See
Command Register 4; RTSI bus clock.
board configuration. See configuration.
bulletin board support, D-1 to D-2
BYTEPTR bit, 4-67
C
C<7..0> bits, 4-66
cable considerations. See also I/O connectors.
field wiring considerations, 2-42 to 2-43
optional equipment, 1-7
Calibration DAC 0 Load Register, 4-62
Calibration DAC 1 Load Register, 4-63
calibration procedures
analog input calibration, 6-9 to 6-10
calibration DACs, 6-8
EEPROM
ADC and DAC FIFO Depth field
(figure), 6-6
Area Information field (figure), 6-6