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AT-MIO-16X User Manual I-10
©
National Instruments Corporation
description, 2-22
ground-referenced signal sources, 2-23
nonreferenced or floating signal sources,
2-24 to 2-26
recommended configuration (table), 2-22
single-ended connections, 2-26 to 2-37
floating signal sources (RSE), 2-27
grounded signal sources
(NRSE), 2-28
when to use, 2-22
differential nonlinearity errors
analog input, A-4
analog output, A-8
DIGGND signal
description (table), 2-17, B-4
digital I/O connections, 2-31 to 2-32
Digital Input Register. See Digital I/O Register
Group.
digital I/O
overview, 1-3
signal connections, 2-31 to 2-32
specifications, A-8
digital I/O circuitry
block diagram, 3-24
programming, 5-36 to 5-37
theory of operation, 3-24 to 3-25
Digital I/O Register Group, 4-68 to 4-70
Digital Input Register
description, 4-69
digital I/O circuitry, 3-25
programming digital I/O
circuitry, 5-36
Digital Output Register
description, 4-70
overview, 3-25
programming digital I/O
circuitry, 5-36
register map, 4-2
Digital Output Register. See Digital I/O
Register Group.
DIOPAEN bit
description, 4-14
programming digital I/O circuitry, 5-36
DIOPBEN bit
description, 4-13
programming digital I/O circuitry, 5-36
DMA Channel Clear Register, 4-58
DMA channels
configuring, 2-7
PC I/O channel interface, 3-4
DMA operations, programming, 5-41 to 5-42
dual-channel interleaved mode, 5-42
procedure, 5-41 to 5-42
servicing update requests, 5-35 to 5-36
single-channel interleaved mode, 5-42
DMA request generation
controlling with bits in Command
Register 3, 4-13 to 4-19
DMA and interrupt modes (table),
4-16 to 4-17
interrupt level selection (table), 4-19
programming, 5-42
DMACHA bit, 4-15
DMACHAB<2..0> bits, 4-11 to 4-12
DMACHB bit, 4-15
DMACHBB<2..0> bits, 4-11
DMATCA bit
clearing analog output circuitry, 5-32
description, 4-26
interrupt programming, 5-43
programming DMA operations, 5-42
DMATCA Clear Register
clearing analog output circuitry, 5-32
description, 4-59
interrupt programming, 5-43
programming DMA operations, 5-42
DMATCB bit
clearing analog output circuitry, 5-32
description, 4-26 to 4-27
interrupt programming, 5-43