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Chapter 2 Configuration and Installation
AT-MIO-16X User Manual 2-36
©
National Instruments Corporation
EXTGATE* Signal
EXTGATE* is an input signal used for hardware gating. EXTGATE*
controls A/D conversion pulses. If EXTGATE* is low, no A/D
conversion pulses occur from EXTCONV* or the sample-interval
counter. If EXTGATE* is high, conversions take place if programmed
and otherwise enabled.
EXTTMRTRIG* Signal
The analog output DACs on the AT-MIO-16X can be updated using
either internal or external signals in posted update mode. The DACs can
be updated externally by using the EXTTMRTRIG* signal from the I/O
connector. This signal updates the DACs when A4RCV is disabled and
the appropriate DAC waveform mode is programmed through one of the
registers in the AT-MIO-16X register set.
The analog output DACs are updated by the high-to-low edge of the
applied pulse. Figure 2-16 shows the timing requirements for the
EXTTMRTRIG* signal.
Figure 2-16.
EXTTMRTRIG* Signal Timing
The minimum pulse width allowed is 50 ns. The DACs are updated
within 100 ns of the high-to-low edge. There is no maximum pulse
width limitation. EXTTMRTRIG* should be high for at least 50 ns
before going low. The EXTTMRTRIG* signal is one HCT load and is
pulled up to +5 V through a 10-kΩ resistor.
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50 nsec minimum
DACs update 100 nsec from this point
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