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188 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.96 L2 Cache Status MSR (L2_STATUS_MSR)
L2_STATUS_MSR returns the status of the L2 cache controller.
5.5.2.97 L2 Cache Index MSR (L2_INDEX_MSR)
L2_INDEX_MSR has the L2 cache index, the way and the data QWORD select for diagnostic accesses.
MSR Address 00001921h
Typ e RO
Reset Value 00000000_00000001h
L2_STATUS_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD
L2_IDLE
L2_STATUS_MSR Bit Descriptions
Bit Name Description
63:1 RSVD Reserved.
0 L2_IDLE L2 Cache Idle. Returns 1 if the L2 cache controller is idle. (Default = 1)
MSR Address 00001922h
Typ e R /W
Reset Value 00000000_00000000h
L2_INDEX_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD
L2_DSEL
RSVD
L2_INDEX RSVD
L2_WAY
L2_INDEX_MSR Bit Descriptions
Bit Name Description
63:18 RSVD Reserved. (Default = 0)
17:16 L2_DSEL L2 Cache Data QWORD Select. (Default = 0)
15 RSVD Reserved. (Default = 0)
14:5 L2_INDEX L2 Cache Index for Diagnostics Accesses. (Default = 0)
4:2 RSVD Reserved. (Default = 0)
1:0 L2_WAY L2 Cache Way Selected for Diagnostics Accesses. (Default = 0)