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AMD Geode™ LX Processors Data Book 255
Graphics Processor Register Definitions
33234H
10h R/W Color Config Source Color Foreground
(GP_SRC_COLOR_FG)
00000000h Page 262
14h R/W Color Config Source Color Background
(GP_SRC_COLOR_BG)
00000000h Page 263
18h-2Ch R/W Pattern Config Pattern Color
(GP_PAT_COLOR_x)
00000000h Page 265
30h-34h R/W Pattern Config Pattern Data (GP_PAT_DATA_x) 00000000h Page 265
38h R/W BLT Config Raster Mode
(GP_RASTER_MODE)
00000000h Page 265
3Ch WO Vector Config Vector Mode
(GP_VECTOR_MODE)
00000000h Page 267
40h WO BLT Config BLT Mode (GP_BLT_MODE) 00000000h Page 268
44h RO BLT Config Status (GP_BLT_STATUS) 00000008h Page 269
44h RO Reset Gen Reset (GP_RESET) none
48h WO BLT Data Host Source (GP_HST_SRC) xxxxxxxxh Page 269
4Ch R/W Address Config Base Offset
(GP_BASE_OFFSET)
01004010h Page 270
50h R/W Command Buff Command Top (GP_CMD_TOP) 01000000h Page 270
54h R/W Command Buff Command Bottom
(GP_CMD_BOT)
00FFFFE0h Page 271
58h R/W Command Buff Command Read
(GP_CMD_READ)
00000000h Page 271
5Ch R/W Command Buff Command Write
(GP_CMD_WRITE)
00000000h Page 272
60h R/W Channel3 Offset (GP_CH3_OFFSET) 00000000h Page 272
64h R/W Channel3 Stride (GP_CH3_MODE_STR) 00000000h Page 273
68h R/W Channel3 Width/Height (GP_CH3_WIDHI) 00000000h Page 275
6Ch WO Channel3 Host Source (GP_CH3_HSRC) xxxxxxxxh Page 275
70h R/W Channel3 LUT Index (GP_LUT_INDEX) 00000000h Page 276
74h R/W Channel3 LUT Data (GP_LUT_DATA) xxxxxxxxh Page 276
78h R/W Interrupt Control Interrupt Control
(GP_INT_CNTRL)
0000FFFFh Page 277
3FF:100h WO BLT Data Host Source (GP_HST_SRC)
(alias)
xxxxxxxxh Page 269
FFF:400h WO Channel3 Host Source (GP_CH3_HSRC)
(alias)
xxxxxxxxh Page 275
Table 6-29. Graphics Processor Configuration Register Summary
GP Memory
Offset Type Group Register Name Reset Value Reference